Title
An Architecture to Accelerate Convolution in Deep Neural Networks.
Abstract
In the past few years, the demand for real-time hardware implementations of deep neural networks (DNNs), especially convolutional neural networks (CNNs), has dramatically increased, thanks to their excellent performance on a wide range of recognition and classification tasks. When considering real-time action recognition and video/image classification systems, latency is of paramount importance. T...
Year
DOI
Venue
2018
10.1109/TCSI.2017.2757036
IEEE Transactions on Circuits and Systems I: Regular Papers
Keywords
Field
DocType
Convolution,Neurons,Computer architecture,Complexity theory,Neural networks,Hardware,Three-dimensional displays
Data set,Latency (engineering),Computer science,Convolutional neural network,Electronic engineering,Artificial intelligence,Contextual image classification,Artificial neural network,Computer engineering,Convolution,CMOS,Machine learning,Computational complexity theory
Journal
Volume
Issue
ISSN
65
4
1549-8328
Citations 
PageRank 
References 
4
0.45
0
Authors
4
Name
Order
Citations
PageRank
Arash Ardakani1338.42
Carlo Condo213221.40
Mehdi Ahmadi350.81
Warren J. Gross472.27