Name
Abstract | ||
|---|---|---|
As the scaling of LSI is going to extremely fine regions toward the ultimate feature size, one of difficulties faced in analog circuit design is reduction of the dynamic range (DR) due to the supply voltage reduction. Unlike digital circuits, where the noise margin for logic operation is the key criterion, analog circuits need an enough DR. The reduced supply voltage directly results in DR degradation of the conventional analog circuits in the voltage-domain. Especially in mixed-signal LSIs, supply voltage instability, caused by logic operation, tends to degrade DR further. In this paper, we will first discuss potential capability of a new paradigm of time-domain circuits by comparing with the conventional voltage/current-domain circuits in terms of DR and power consumption. Next, as basic circuit components for the time-domain approach, current status of TDA (Time-Difference Amplifier) and TDC (Time-to-Digital Converter) will be reviewed. Finally, some application examples of the time-domain circuits are introduced to demonstrate the feasibility of the time-domain approach. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1587/elex.15.20182001 | IEICE ELECTRONICS EXPRESS |
Keywords | Field | DocType |
low voltage analog, time-domain circuit, TDA, TDC, PLL, soft thermometer code, time-domain processing | Time domain,Phase-locked loop,Analogue electronics,Micrometre,Computer science,Electronic engineering | Journal |
Volume | Issue | ISSN |
15 | 6 | 1349-2543 |
Citations | PageRank | References |
2 | 0.37 | 14 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| kunihiro asada | 1 | 273 | 78.26 |
| Toru Nakura | 2 | 92 | 31.27 |
| Tetsuya Iizuka | 3 | 92 | 33.22 |
| Makoto Ikeda | 4 | 1202 | 207.10 |