Title
System simulation with gem5 and SystemC: The keystone for full interoperability
Abstract
SystemC TLM based virtual prototypes have become the main tool in industry and research for concurrent hardware and software development, as well as hardware design space exploration. However, there exists a lack of accurate, free, changeable and realistic SystemC models of modern CPUs. Therefore, many researchers use the cycle accurate open source system simulator gem5, which has been developed in parallel to the SystemC standard. In this paper we present a coupling of gem5 with SystemC that offers full interoperability between both simulation frameworks, and therefore enables a huge set of possibilities for system level design space exploration. Furthermore, we show that the coupling itself only induces a relatively small overhead to the total execution time of the simulation.
Year
DOI
Venue
2017
10.1109/SAMOS.2017.8344612
2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)
Keywords
Field
DocType
system level design space exploration,system simulation,interoperability,software development,hardware design space exploration,realistic SystemC models,modern CPUs,cycle accurate open source system simulator gem5,SystemC standard,simulation frameworks,SystemC TLM based virtual prototypes,concurrent hardware development,transaction level modeling,multiprocessor system-on-chips
Interoperability,Computer science,Electronic system-level design and verification,SystemC,Space exploration,Execution time,Design space exploration,Software development,Embedded system
Conference
ISBN
Citations 
PageRank 
978-1-5386-3438-7
1
0.36
References 
Authors
6
4
Name
Order
Citations
PageRank
Christian Menard110.36
Jeronimo Castrillon211815.22
Matthias Jung311116.76
Norbert Wehn41165137.17