Title
Designing Reliable Processor Cores In Ultimate Cmos And Beyond: A Double Sampling Solution
Abstract
The double sampling paradigm is an efficient method to protect the circuits against soft-errors. But the data that are going out of the area protected by double sampling are still vulnerable. In this paper we proposed an architectural solution that uses three latches to remove those constraints and protect the area outside the double sampling domain without adding a buffer stage.
Year
Venue
Keywords
2018
PROCEEDINGS OF THE 2018 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE)
double sampling, soft-errors, LEON3, reliability
Field
DocType
ISSN
Computer science,Parallel computing,CMOS,Double sampling,Computer hardware,Electronic circuit,Multi-core processor
Conference
1530-1591
Citations 
PageRank 
References 
0
0.34
0
Authors
4
Name
Order
Citations
PageRank
Thierry Bonnoit162.27
Fraidy Bouesse200.34
Nacer-Eddine Zergainoh312919.39
Michael Nicolaidis4996129.91