Abstract | ||
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This paper proposes a new partial scan approach in which the problem of selecting flip-flops in partial scan designs is converted to the balanced graph transformation problem based on an integer linear programming formulation. The complexity of the problem is analyzed and a scalable approach is proposed to deal with complicated circuits. Experimental results on a set of benchmark circuits show tha... |
Year | DOI | Venue |
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2018 | 10.1109/TCAD.2017.2729348 | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
Keywords | Field | DocType |
Logic gates,Complexity theory,Sequential circuits,Optimization,Integer linear programming,Test pattern generators,Electronic ballasts | Partial scan,Mathematical optimization,Logic gate,Sequential logic,Computer science,Scan chain,Algorithm,Integer programming,Graph rewriting,Electronic circuit,Scalability | Journal |
Volume | Issue | ISSN |
37 | 5 | 0278-0070 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
2 |