Title
CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories.
Abstract
MPSoCs with hierarchical communication infrastructures are promising architectures for low power embedded systems. Multiple CPU clusters are coupled using an Network-on-Chip (NoC). Our CoreVA-MPSoC targets streaming applications in embedded systems, like signal and video processing. In this work we introduce a tightly coupled shared data memory to each CPU cluster, which can be accessed by all CPU...
Year
DOI
Venue
2018
10.1109/TPDS.2017.2785799
IEEE Transactions on Parallel and Distributed Systems
Keywords
Field
DocType
Memory architecture,Memory management,Clocks,System-on-chip,Programming,VLIW
Computer architecture,Memory hierarchy,Shared memory,Very long instruction word,Computer science,Memory management,Latency (engineering),Throughput,MPSoC,Memory architecture,Distributed computing
Journal
Volume
Issue
ISSN
29
5
1045-9219
Citations 
PageRank 
References 
2
0.39
0
Authors
9
Name
Order
Citations
PageRank
Johannes Ax1153.81
Gregor Sievers2193.26
Julian Daberkow360.83
Martin Flasskamp4102.63
Marten Vohrmann530.80
Thorsten Jungeblut6337.67
Wayne A. Kelly7256.10
Mario Porrmann842050.91
U. Rückert9755103.61