Paper Info
Title
Approximate-Dct-Derived Measurement Matrices With Row-Operation-Based Measurement Compression And Its Vlsi Architecture For Compressed Sensing
Abstract
Compressed Sensing based CMOS image sensor (CS-CIS) is a new generation of CMOS image sensor that significantly reduces the power consumption. For CS-CIS, the image quality and data volume of output are two important issues to concern. In this paper, we first proposed an algorithm to generate a series of deterministic and ternary matrices, which improves the image quality, reduces the data volume and are compatible with CS-CIS. Proposed matrices are derived from the approximate DCT and trimmed in 2D-zigzag order, thus preserving the energy compaction property as DCT does. Moreover, we proposed matrix row operations adaptive to the proposed matrix to further compress data (measurements) without any image quality loss. At last, a low-cost VLSI architecture of measurements compression with proposed matrix row operations is implemented. Experiment results show our proposed matrix significantly improve the coding efficiency by BD-PSNR increase of 4.2 dB, comparing with the random binary matrix used in the-state-of-art CS-CIS. The proposed matrix row operations for measurement compression further increases the coding efficiency by 0.24 dB BD-PSNR (4.8% BD-rate reduction). The VLSI architecture is only 4.3 K gates in area and 0.3 mW in power consumption.
Year
DOI
Venue
2018
10.1587/transele.E101.C.263
IEICE TRANSACTIONS ON ELECTRONICS
Keywords
Field
DocType
compressed sensing, approximate DCT, measurement coding, measurement matrix, intra prediction, VLSI architecture, CMOS image sensor
Compression (physics),Image sensor,Matrix (mathematics),Discrete cosine transform,Electronic engineering,Engineering,Compressed sensing,Vlsi architecture
Journal
Volume
Issue
ISSN
E101C
4
1745-1353
Citations 
PageRank 
References 
0
0.34
0
Authors
4
Name
Order
Citations
PageRank
Jian-Bin Zhou1234.66
Dajiang Zhou235550.25
Takeshi Yoshimura34313.56
Satoshi Goto4144.21