Name
Abstract | ||
|---|---|---|
Asynchronous logic offers the advantages of no clock tree, robust circuit operation, avoidance of worst-case timing margins, and a reduced emission spectrum. Thus, computational paradigms are sought to attain advantages of clockless logic by leveraging the complementary characteristics of emerging devices and CMOS transistors within novel circuit designs. This paper introduces Spin Torque Enabled ... |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/TC.2017.2776139 | IEEE Transactions on Computers |
Keywords | Field | DocType |
Logic gates,Resistance,Memristors,Magnetic hysteresis,Magnetic tunneling,Registers,Spintronics | Asynchronous communication,Memristor,Logic gate,Adder,Computer science,Floating point,Parallel computing,CMOS,Electronic engineering,Theoretical computer science,Transistor,Asynchronous circuit | Journal |
Volume | Issue | ISSN |
67 | 5 | 0018-9340 |
Citations | PageRank | References |
0 | 0.34 | 10 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yu Bai | 1 | 14 | 8.86 |
| R. F. DeMara | 2 | 528 | 70.33 |
| Jia Di | 3 | 2 | 1.50 |
| Mingjie Lin | 4 | 73 | 25.04 |