Name
Affiliation
Papers
YU BAI
University of Central Florida, Orlando, FL, USA
25
Collaborators
Citations 
PageRank 
50
14
8.86
Referers 
Referees 
References 
27
244
90
Search Limit
100244
Title
Citations
PageRank
Year
An Efficient Real-Time Object Detection Framework on Resource-Constricted Hardware Devices via Software and Hardware Co-design00.342021
High Efficient Deep Feature Extraction and Classification of Spectral-Spatial Hyperspectral Image Using Cross Domain Convolutional Neural Networks.10.362019
Design and Implementation of 32-Channel ADPCM CODEC00.342019
Energy Efficient Mobile Service Computing With Differential Spintronic-C-Elements: A Logic-In-Memory Asynchronous Computing Paradigm00.342019
Multimodal Biometrics For Enhanced Iot Security00.342019
Robust Large-Scale Convolution through Stochastic-Based Processing Without Multipliers00.342019
Compressing Deep Neural Networks Using Toeplitz Matrix: Algorithm Design And Fpga Implementation00.342019
Hyperspectral image classification with SVM and guided filter.20.382019
Information, knowledge, and semantics for interacting with Internet-of-Things.00.342019
Clockless Spintronic Logic: A Robust and Ultra-Low Power Computing Paradigm.00.342018
Leveraging Spintronic Devices for Efficient Approximate Logic and Stochastic Neural Networks.00.342018
Spectral-Spatial HyperspectralImage Classification With K-Nearest Neighbor and Guided Filter.10.362018
An Adaptive SVR for High-Frequency Stock Price Forecasting.20.372018
Stochastic-Based Synapse and Soft-Limiting Neuron with Spintronic Devices for Low Power and Robust Artificial Neural Networks.00.342018
K-Nearest Neighbor combined with guided filter for hyperspectral image classification.10.362017
A Spin-Orbit Torque based Cellular Neural Network (CNN) Architecture.00.342017
High efficient reconfigurable PUF through spin hall-induced coupled-oscillators00.342017
Stochastic-Based Spin-Programmable Gate Array with Emerging MTJ Device Technology (Abstract Only).00.342016
Ultra-Robust Null Convention Logic Circuit with Emerging Domain Wall Devices.20.402016
Artificial Haze Immune Algorithm for Image Processing00.342016
Universal Random Number Generation With Field-Programmable Analog Array And Magnetic Tunneling Junction (Mtj) Devices10.372015
Stochastically computing discrete Fourier transform with reconfigurable digital fabric00.342014
Optimally mitigating BTI-induced FPGA device aging with discriminative voltage scaling (abstract only)00.342014
Energy-efficient multiplier-less discrete convolver through probabilistic domain transformation40.512014
Exploiting algorithmic-level memory parallelism in distributed logic-memory architecture through hardware-assisted dynamic graph (abstract only)00.342013