Name
Title | ||
|---|---|---|
A Quarter-Rate 3-Tap Dfe For 4gbps Data Rate With Switched-Capapctiors Based 1st Speculative Tap |
Abstract | ||
|---|---|---|
This paper presents a quarter-rate 3-tap DFE design for 4Gbps data rate with switched-capacitors based 1st speculative tap. We propose a quarter-rate DFE to supplement a drawback of switched-capacitors based half-rate DFE. In the half-rate DFE, comparators have not only low input capacitances but also low transconductance (low sensitivity) in order to eliminate the first post-cursor. Therefore, the comparators need to have enough pull-down time to make an accurate decision for a bit. The quarter-rate DFE approach has advantages of enough pull-down time because of operating at lower frequency of each data path and widely opened eye diagram at the output. In addition, it consumes less power than the half-rate DFE. The DFE is simulated with 180nm technology node and 1.8V power supply. The S21 parameter (channel loss) is 27 dB at 4 Gbps data rate, and the power consumption is 14.52 mW. |
Year | Venue | Keywords |
|---|---|---|
2017 | PROCEEDINGS INTERNATIONAL SOC DESIGN CONFERENCE 2017 (ISOCC 2017) | quarter-rate, decision feedback equalizer, switched-capacitor, speculative tap |
DocType | ISSN | Citations |
Conference | 2163-9612 | 0 |
PageRank | References | Authors |
0.34 | 0 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Gyunam Jeon | 1 | 1 | 1.41 |
| Yong-bin Kim | 2 | 338 | 55.72 |