Name
Abstract | ||
|---|---|---|
SimTRaX is a simulation infrastructure for simultaneous exploration of highly parallel accelerator architectures and how applications map to them. The infrastructure targets both cycle-accurate and functional simulation of architectures with thousands of simple cores that may share expensive computation and memory resources. A modified LLVM backend used to compile C++ programs for the simulated architecture allows the user to create custom instructions that access proposed special-purpose hardware and to debug and profile the applications being executed. The simulator models a full memory hierarchy including registers, local scratchpad RAM, shared caches, external memory channels, and DRAM main memory, leveraging the USIMM DRAM simulator to provide accurate dynamic latencies and power usage. SimTRaX provides a powerful and flexible infrastructure for exploring a class of extremely parallel architectures for parallel applications that are not easily simulated using existing simulators.
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Year | DOI | Venue |
|---|---|---|
2018 | 10.1145/3194554.3194650 | ACM Great Lakes Symposium on VLSI |
Keywords | Field | DocType |
Architecture simulation, single program multiple data, LLVM | Dram,Architecture,Memory hierarchy,Computer science,Communication channel,Compiler,Real-time computing,Computation,Auxiliary memory,Embedded system,Debugging | Conference |
ISSN | ISBN | Citations |
1066-1395 | 978-1-4503-5724-1 | 1 |
PageRank | References | Authors |
0.35 | 0 | 8 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Konstantin Shkurko | 1 | 33 | 4.33 |
| Tim Grant | 2 | 4 | 0.72 |
| Erik Brunvand | 3 | 509 | 66.09 |
| Daniel Kopta | 4 | 82 | 5.73 |
| Josef Spjut | 5 | 101 | 10.20 |
| Elena Vasiou | 6 | 1 | 1.70 |
| Ian Mallett | 7 | 4 | 4.78 |
| Cem Yuksel | 8 | 264 | 30.15 |