Paper Info
Title
On the Cost of Freedom From Interference in Heterogeneous SoCs.
Abstract
In heterogeneous CPU+GPU SoCs where a single DRAM is shared between both devices, concurrent memory accesses from both devices can lead to slowdowns due to memory interference. This prevents the deployment of real-time tasks, which need to be guaranteed to complete before a set deadline. However, freedom from interference can be guaranteed through software memory scheduling, but may come at a significant cost due to frequent CPU-GPU synchronizations. In this paper we provide a compile-time model to help developers make informed decisions on how to achieve freedom from interference at the lowest cost.
Year
DOI
Venue
2018
10.1145/3207719.3207735
SCOPES '18: PROCEEDINGS OF THE 21ST INTERNATIONAL WORKSHOP ON SOFTWARE AND COMPILERS FOR EMBEDDED SYSTEMS
Field
DocType
Citations 
Dram,Software deployment,Memory scheduling,Computer science,Parallel computing,Interference theory,Fault tolerance,Software,Interference (wave propagation),Dynamic priority scheduling,Embedded system
Conference
0
PageRank 
References 
Authors
0.34
5
3
Name
Order
Citations
PageRank
Björn Forsberg1102.35
Luca Benini2131161188.49
Andrea Marongiu333739.19