Name
Title | ||
|---|---|---|
Diagnosis algorithms for a reconfigurable and defect tolerant JTAG scan chain in large area integrated circuits. |
Abstract | ||
|---|---|---|
A set of routing algorithms is proposed to diagnose multiple defects in a class of reconfigurable and defect tolerant JTAG scan chains. These algorithms find a maximum number of functional elements with a minimum set of paths with an affordable reconfiguration time. A heuristic dichotomic search algorithm is applied on the nonfunctional paths to accurately locate defective elements. Experiments demonstrate that our algorithms accurately pinpoint 99.1% of single defects and 71% of multiple defects when eight defects were randomly injected. They were also successfully applied on a large area integrated circuit where multiple clusters of defects were located. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1016/j.vlsi.2018.02.010 | Integration |
Keywords | Field | DocType |
Defect tolerance,Diagnosis,Defect tolerant scan chain,Large area integrated circuit (LAIC) | Heuristic,Computer science,Scan chain,Algorithm,Dichotomic search,Integrated circuit,Control reconfiguration,Routing algorithm | Journal |
Volume | ISSN | Citations |
62 | 0167-9260 | 0 |
PageRank | References | Authors |
0.34 | 13 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Safa Berrima | 1 | 1 | 1.07 |
| Yves Blaquière | 2 | 24 | 11.24 |
| Yvon Savaria | 3 | 566 | 139.13 |