Title
A pattern-based routing algorithm for a novel electronic system prototyping platform.
Abstract
A recently proposed wafer-sized active integrated circuit capable of programmably interconnecting integrated circuits deposited on its surface needs a routing tool with computation time in the order of minutes. In this paper, a first algorithm computes the shortest route in O(n), n being the number of edges between source and destination. The second algorithm performs a parallelized random search to resolve conflicting routes. Our algorithm can route high density PCB-like netlists (25% vertices occupancy) on an 80,000 vertices regular interconnection network in about 9 min, while typical density netlists (5–15%) are routed in times ranging from 0.4 to 11 s.
Year
DOI
Venue
2018
10.1016/j.vlsi.2018.03.005
Integration
Keywords
Field
DocType
Routing algorithm,Interconnection network,Rapid prototyping,Wafer-sized integrated circuit
Random search,Vertex (geometry),Computer science,Real-time computing,Ranging,Electronic systems,Computational science,Interconnection,Integrated circuit,Computation,Routing algorithm
Journal
Volume
ISSN
Citations 
62
0167-9260
0
PageRank 
References 
Authors
0.34
16
3
Name
Order
Citations
PageRank
Etienne Lepercq141.35
Yves Blaquière22411.24
Yvon Savaria3566139.13