Name
Title | ||
|---|---|---|
Design of an On-Silicon-Interposer Passive Equalizer for Next Generation High Bandwidth Memory With Data Rate Up To 8 Gb/s. |
Abstract | ||
|---|---|---|
In this paper, we propose a new on-silicon-interposer passive equalizer for next generation high bandwidth memory (HBM) with 1024 I/O lines and 8-Gb/s data transmission, which is four times higher than the data rate of HBM generation 2. The proposed equalizer meets the three requirements for the implementation of ultra-high bandwidth interface with wide I/O lines: 1) small area; 2) fine pitch; and... |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/TCSI.2017.2783762 | IEEE Transactions on Circuits and Systems I: Regular Papers |
Keywords | Field | DocType |
Equalizers,Bandwidth,Integrated circuit modeling,Metals,Capacitance,Silicon,Next generation networking | Capacitance,Equalization (audio),Data transmission,High Bandwidth Memory,Ground plane,Communication channel,Electronic engineering,Interposer,Bandwidth (signal processing),Mathematics | Journal |
Volume | Issue | ISSN |
65 | 7 | 1549-8328 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yeseul Jeon | 1 | 0 | 1.01 |
| Heegon Kim | 2 | 15 | 7.69 |
| Joungho Kim | 3 | 0 | 0.34 |
| Minkyu Je | 4 | 333 | 58.17 |