Paper Info
Title
Optimizing memory bandwidth exploitation for OpenVX applications on embedded many-core accelerators.
Abstract
In recent years, image processing has been a key application area for mobile and embedded computing platforms. In this context, many-core accelerators are a viable solution to efficiently execute highly parallel kernels. However, architectural constraints impose hard limits on the main memory bandwidth, and push for software techniques which optimize the memory usage of complex multi-kernel applications. In this work, we propose a set of techniques, mainly based on graph analysis and image tiling, targeted to accelerate the execution of image processing applications expressed as standard OpenVX graphs on cluster-based many-core accelerators. We have developed a run-time framework which implements these techniques using a front-end compliant to the OpenVX standard, and based on an OpenCL extension that enables more explicit control and efficient reuse of on-chip memory and greatly reduces the recourse to off-chip memory for storing intermediate results. Experiments performed on the STHORM many-core accelerator demonstrate that our approach leads to massive reduction of time and bandwidth, even when the main memory bandwidth for the accelerator is severely constrained.
Year
DOI
Venue
2018
10.1007/s11554-015-0544-0
J. Real-Time Image Processing
Keywords
Field
DocType
OpenVX, OpenCL, Embedded computer vision, Bandwidth reduction, Many-core accelerators
Information system,Graph,Memory bandwidth,Computer science,Reuse,Parallel computing,Image processing,Power graph analysis,Real-time computing,Bandwidth (signal processing),Software,Embedded system
Journal
Volume
Issue
ISSN
15
1
1861-8219
Citations 
PageRank 
References 
2
0.38
34
Authors
4
Name
Order
Citations
PageRank
Giuseppe Tagliavini1719.36
Germain Haugou217010.71
Andrea Marongiu333739.19
Luca Benini4131161188.49