Title
Adherence of a high-speed RRP LDMOS characterization setup to JESD 24-10 standard
Abstract
Reverse recovery parameter (RRP) characterization is a vital process in the modeling of LDMOS devices. This paper presents the validation of a RRP characterization setup to assess its adherence to the JEDEC JESD 24-10 standard when used on high-speed LDMOS devices. Circuit performance is exhaustively evaluated using both, packaged and wafer-level devices. Aspects that include switching speed, repeatability, consistency, and sensitivity to both forward and reverse bias voltages were analyzed to determine the setup compliance to the standard.
Year
DOI
Venue
2017
10.1109/LASCAS.2017.7948100
2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS)
Keywords
Field
DocType
reverse recovery parameter characterization,RRP characterization,JEDEC JESD 24-10 standard,high-speed LDMOS devices,wafer-level devices,forward bias voltages,reverse bias voltages,setup compliance,high-speed RRP LDMOS characterization setup
Reverse bias,Switching time,LDMOS,Computer science,Voltage,Electronic engineering,Reverse recovery,Circuit performance,Repeatability
Conference
ISBN
Citations 
PageRank 
978-1-5090-5860-0
0
0.34
References 
Authors
1
2
Name
Order
Citations
PageRank
Carlos Bernal112.46
Manuel Jiménez2206.31