Paper Info
Title
Hardware Supported Permission Checks on Persistent Objects for Performance and Programmability.
Abstract
Non-Volatile Memory technologies are advancing rapidly and may augment or replace DRAM in future systems. However, a key question is how programmers will use them to construct and manipulate persistent data. One possible approach gives programmers direct access to persistent memory using relocatable persistent pools that hold persistent objects which can be accessed using persistent pointers, called ObjectIDs. Prior work has shown that hardware-supported address translation for ObjectIDs provides significant performance improvement and simplifies programming, however these works did not consider the large overheads incurred to check permissions before accessing persistent objects. In this paper, we identify permission checking in hardware as a critical mechanism that must be included when translating ObjectIDs to addresses in order to simplify programming and fully benefit from hardware translation. To support it, we add a System Persistent Object Table (SPOT) to support translation and permissions checks on ObjectIDs. The SPOT holds all known pools, their physical address, and their permissions information in memory. When a program attempts to access a persistent object, the SPOT is consulted and permissions are verified without trapping to the operating system. We have implemented our new design in a cycle accurate simulator and compared it with software only approaches and prior work. We find that our design offers a compelling 2.9x speedup on average for microbenchmarks that access pools with the RANDOM pattern and 1.4x and 1.8x speedup on TPC-C and vacation, respectively, for the SEPARATE pattern.
Year
DOI
Venue
2018
10.1109/ISCA.2018.00046
ISCA
Keywords
Field
DocType
non-volatile memory, persistent memory programming, persistent data permission check
Permission,Pointer (computer programming),Data structure,Persistent data structure,Physical address,Computer science,Software,Computer hardware,Speedup,Performance improvement
Conference
ISSN
ISBN
Citations 
1063-6897
978-1-5386-5984-7
0
PageRank 
References 
Authors
0.34
27
3
Name
Order
Citations
PageRank
Tiancong Wang182.81
Sakthikumaran Sambasivam260.75
James Tuck356433.06