Title | ||
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Secure Double Rate Registers as an RTL Countermeasure Against Power Analysis Attacks. |
Abstract | ||
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Power analysis attacks (PAAs), a class of side-channel attacks based on power consumption measurements, are a major concern in the protection of secret data stored in cryptographic devices. In this paper, we introduce the secure double rate registers (SDRRs) as a register-transfer level (RTL) countermeasure to increase the security of cryptographic devices against PAAs. We exploit the SDRR in a co... |
Year | DOI | Venue |
---|---|---|
2018 | 10.1109/TVLSI.2018.2816914 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | Field | DocType |
Power demand,Registers,Encryption,Computer architecture,Clocks,Correlation | Power analysis,Computer science,Cryptography,Advanced Encryption Standard,Chip,Real-time computing,CMOS,Encryption,Gate array,Cycles per instruction,Embedded system | Journal |
Volume | Issue | ISSN |
26 | 7 | 1063-8210 |
Citations | PageRank | References |
2 | 0.36 | 0 |
Authors | ||
6 |
Name | Order | Citations | PageRank |
---|---|---|---|
Davide Bellizia | 1 | 21 | 6.31 |
simone bongiovanni | 2 | 15 | 1.96 |
Pietro Monsurrò | 3 | 48 | 12.78 |
giuseppe scotti | 4 | 308 | 39.14 |
A. Trifiletti | 5 | 433 | 63.29 |
Trotta, F. | 6 | 4 | 0.77 |