Name
Title | ||
|---|---|---|
Hardware Implementation and Performance Analysis of Resource Efficient Probabilistic Hard Decision LDPC Decoders. |
Abstract | ||
|---|---|---|
The Gallager B (GaB), among the hard-decision class of low-density-parity-check (LDPC) algorithms, is an ideal candidate for designing high-throughput decoder hardware. However, GaB suffers from poor error-correction performance. We introduce a probabilistic GaB (PGaB) algorithm that disturbs the decisions made during the decoding iterations randomly with a probability value determined based on ex... |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/TCSI.2018.2815008 | IEEE Transactions on Circuits and Systems I: Regular Papers |
Keywords | Field | DocType |
Decoding,Hardware,Iterative decoding,Probabilistic logic,Throughput,Field programmable gate arrays | Heuristic,Gradient descent,Low-density parity-check code,Field-programmable gate array,Error detection and correction,Probabilistic logic,Decoding methods,Computer hardware,Mathematics,Clock rate | Journal |
Volume | Issue | ISSN |
65 | 9 | 1549-8328 |
Citations | PageRank | References |
3 | 0.41 | 0 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Burak Unal | 1 | 4 | 1.12 |
| Ali Akoglu | 2 | 157 | 29.40 |
| Ghaffari Fakhreddine | 3 | 53 | 14.06 |
| B. V. Vasic | 4 | 17 | 5.83 |