Name
Title | ||
|---|---|---|
A 0.5-V 1.6-mW 2.4-GHz Fractional-N All-Digital PLL for Bluetooth LE With PVT-Insensitive TDC Using Switched-Capacitor Doubler in 28-nm CMOS. |
Abstract | ||
|---|---|---|
This paper proposes an ultra-low-voltage (ULV) fractional-N all-digital PLL (ADPLL) powered from a single 0.5-V supply. While its digitally controlled oscillator (DCO) runs directly at 0.5 V, an internal switched-capacitor dc-dc converter “doubles” the supply voltage to all the digital circuitry and particularly regulates the time-to-digital converter (TDC) supply to stabilize its resolution, thus... |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/JSSC.2018.2843337 | IEEE Journal of Solid-State Circuits |
Keywords | DocType | Volume |
Clocks,Delays,Calibration,Bluetooth,Phase locked loops,Oscillators,Voltage control | Journal | 53 |
Issue | ISSN | Citations |
9 | 0018-9200 | 2 |
PageRank | References | Authors |
0.36 | 0 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Naser Pourmousavian | 1 | 2 | 0.36 |
| Feng-Wei Kuo | 2 | 44 | 5.46 |
| Teerachot Siriburanon | 3 | 149 | 21.47 |
| Masoud Babaie | 4 | 195 | 25.05 |
| Robert Bogdan Staszewski | 5 | 536 | 93.76 |