Name
Abstract | ||
|---|---|---|
Low access energy embedded non-volatile memory is critical for low power sensing systems. This paper proposes a charge-recycling FRAM design that uses resonance between the FRAM array capacitance and an off-chip inductor to perform both write and read functions. In 130 nm, the 256×80 FRAM increases energy efficiency by 3× compared to standard operation, achieves 0.99pJ/bit write energy, 0.4pJ/bit read energy and 102Mbps at 1V. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/VLSIC.2018.8502265 | 2018 IEEE Symposium on VLSI Circuits |
Keywords | Field | DocType |
FRAM array capacitance,off-chip inductor,energy efficient adiabatic FRAM,IoT applications,low access energy,low power sensing systems,charge-recycling FRAM design,embedded nonvolatile memory,voltage 1.0 V,size 130.0 nm,bit rate 102 Mbit/s | Adiabatic process,Sensing system,Capacitance,Computer science,Efficient energy use,Internet of Things,Inductor,Electronic engineering,Non-volatile memory | Conference |
ISSN | ISBN | Citations |
2158-5601 | 978-1-5386-4215-3 | 0 |
PageRank | References | Authors |
0.34 | 0 | 7 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Supreet Jeloka | 1 | 41 | 6.41 |
| Zhehong Wang | 2 | 12 | 3.42 |
| Ruochen Xie | 3 | 0 | 0.34 |
| Sudhanshu Khanna | 4 | 55 | 8.45 |
| Steven Bartling | 5 | 17 | 3.22 |
| Dennis Sylvester | 6 | 5295 | 535.53 |
| David Blaauw | 7 | 8916 | 823.47 |