Name
Title | ||
|---|---|---|
A 12.8 Gb/s Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth and Large-Capacity Storage Systems |
Abstract | ||
|---|---|---|
This paper proposes a prototype downlink I/F employing a tapered-BW daisy-chained topology enabled by a proposed SCM2 technique to exploit the low throughput of NAND I/O, which allows a NAND controller to handle 32 NAND PKGs on a single I/F channel. The fabricated I/F achieved 12.8 Gb/s with BER of 10−
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sup>
while consuming 252.1 mW for a TX and 375.7 mW for four RXs. The FoM is 409.6 PKG·Gb/s. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/VLSIC.2018.8502340 | 2018 IEEE Symposium on VLSI Circuits |
Keywords | Field | DocType |
large-capacity storage systems,tapered-BW daisy-chained topology,SCM2 technique,NAND controller,prototype downlink I-F,spectrally compressed multiband multiplexing,daisy chain-based downlink,NAND PKG,single I-F channel,high-bandwidth storage systems,power 252.1 mW,power 375.7 mW | Control theory,Computer science,Daisy chain,Communication channel,NAND gate,Electronic engineering,Throughput,Multiplexing,Orthogonal frequency-division multiplexing,Telecommunications link | Conference |
ISSN | ISBN | Citations |
2158-5601 | 978-1-5386-4215-3 | 0 |
PageRank | References | Authors |
0.34 | 1 | 8 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yuta Tsubouchi | 1 | 0 | 1.01 |
| Daisuke Miyashita | 2 | 72 | 9.99 |
| Yuji Satoh | 3 | 0 | 0.68 |
| Takashi Toi | 4 | 0 | 1.01 |
| Fumihiko Tachibana | 5 | 37 | 5.98 |
| m morimoto | 6 | 1 | 1.06 |
| Junji Wadatsumi | 7 | 0 | 0.34 |
| Jun Deguchi | 8 | 15 | 4.34 |