Title
Test Resource Reused Debug Scheme to Reduce the Post-Silicon Debug Cost.
Abstract
In this paper, a design for debug (DFD) method that reuses test resources is proposed to reduce the debug cost in post-silicon validation. With the proposed method, the trace buffer is shared for embedded cores to capture the signatures of each core concurrently by reusing a test access mechanism. In this case, the depth of the trace buffer allocated to the core is reconfigurable and variable acco...
Year
DOI
Venue
2018
10.1109/TC.2018.2835462
IEEE Transactions on Computers
Keywords
Field
DocType
Buffer storage,Routing,Debugging,Computer architecture,Runtime
Computer science,Reuse,Parallel computing,Silicon debug,Trace buffer,Embedded system,Debugging
Journal
Volume
Issue
ISSN
67
12
0018-9340
Citations 
PageRank 
References 
0
0.34
0
Authors
4
Name
Order
Citations
PageRank
Inhyuk Choi1154.75
Hyunggoy Oh2144.80
Young Woo Lee395.76
Sungho Kang4126.64