Name
Abstract | ||
|---|---|---|
Temperature dependent DC and double pulse measurements are performed on p-GaN gated AlGaN/GaN enhancement mode power transistors. Devices with improved Schottky metal/p-GaN interface quality and p-GaN sidewall passivation are studied. It is shown that both processes reduce the reverse and forward gate leakage current significantly. This is related to the improved p-GaN sidewall roughness and density of interface states, all contributing to sidewall leakage. Under double pulsed testing, an untreated device shows a negative threshold voltage shift at high forward gate voltage, which is explained by hole trapping in the barrier. Improving the p-GaN sidewall quality reduces the supply of holes towards the p-GaN/AlGaN interface, and a positive threshold voltage shift is observed. This can be explained by electron injection from the channel into the barrier. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/IRPS.2018.8353582 | 2018 IEEE International Reliability Physics Symposium (IRPS) |
Keywords | Field | DocType |
GaN,high-electron-mobility transistor,p-GaN gate,gate leakage current,double pulsed testing | Analytical chemistry,Leakage (electronics),Power semiconductor device,Trapping,Surface finish,Schottky diode,Engineering,Passivation,High-electron-mobility transistor,Threshold voltage,Optoelectronics | Conference |
ISSN | ISBN | Citations |
1541-7026 | 978-1-5386-5480-4 | 1 |
PageRank | References | Authors |
0.63 | 0 | 8 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Arno Stockman | 1 | 1 | 0.63 |
| E. Canato | 2 | 1 | 1.64 |
| Alaleh Tajalli | 3 | 1 | 1.30 |
| Matteo Meneghini | 4 | 45 | 30.20 |
| Gaudenzio Meneghesso | 5 | 67 | 38.27 |
| Enrico Zanoni | 6 | 60 | 37.05 |
| P. Moens | 7 | 11 | 8.32 |
| Benoit Bakeroot | 8 | 6 | 3.43 |