Name
Abstract | ||
|---|---|---|
Among many asynchronous design styles, precharge half/full buffers (PCHB/PCFB) are popular due to small area and high performance. This paper proposes new test methodology for PCHB/PCFB asynchronous circuits. Our proposed design for testability (DfT) does not break any internal feedback loop so it is small in area. There are two major theoretical contributions in this paper. First, this paper analyzes the fault effects of transition delay faults, which were not studied in depth by previous research. Second, we also analyze faults on fanout branches that break the isochronic fork assumption. One important conclusion is that these faults can not only degrade the circuit performance but also modify data so they must be tested. We propose three-pattern tests for stuck-at faults and four-pattern tests for transition delay faults. In addition, we propose a new model for ATPG so that existing tools can be used. On the average, our work achieves 93% and 92% stuck-at and transition delay fault coverage, respectively, which is much higher than previous techniques. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/TEST.2018.8624757 | 2018 IEEE International Test Conference (ITC) |
Keywords | Field | DocType |
Asynchronous circuits,Automatic test pattern generation,Design for testability,Precharge half-buffer | Fork (system call),Design for testing,Test method,Automatic test pattern generation,Asynchronous communication,Fault coverage,Computer science,Design styles,Electronic engineering,Electronic circuit | Conference |
ISSN | ISBN | Citations |
1089-3539 | 978-1-5386-8383-5 | 0 |
PageRank | References | Authors |
0.34 | 7 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ting-Yu Shen | 1 | 0 | 1.01 |
| Chia-Cheng Pai | 2 | 0 | 0.34 |
| Tsai-Chieh Chen | 3 | 0 | 0.34 |
| James Chien-Mo Li | 4 | 187 | 27.16 |
| Samuel Pan | 5 | 0 | 0.34 |