Name
Abstract | ||
|---|---|---|
Branch predictors are widely used to boost the performance of microprocessors. However, this comes at the expense of power because accurate branch prediction requires simultaneous access to several large tables on every fetch. Consumed power can be drastically reduced by operating the predictor under sub-nomimal voltage levels (undervolting) using a separate voltage domain. Faulty behavior resulting from undervolting the predictor arrays impacts performance due to additional mispredictions but does not compromise system reliability or functional correctness. In this work, we explore how two well established branch predictors (Tournament and L-Tage) behave when aggressively undervolted below minimum fault-free supply voltage (Vmin). Our results based on fault injection and performance simulations show that both predictors significantly reduce their power consumption by more than 63% and can deliver a peak 6.4% energy savings in the overall system, without observable performance degradation. However, energy consumption can increase for both predictors due to extra mispredictions, if undervolting becomes too aggressive. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/ICCD.2018.00030 | 2018 IEEE 36th International Conference on Computer Design (ICCD) |
Keywords | Field | DocType |
branch predictors,energy efficiency,gem5,microarchitectural simulation,power,voltage scaling | Computer science,Efficient energy use,Voltage,Correctness,Real-time computing,Energy consumption,Branch predictor,Reliability engineering,Fault injection,Power consumption | Conference |
ISSN | ISBN | Citations |
1063-6404 | 978-1-5386-8478-8 | 0 |
PageRank | References | Authors |
0.34 | 17 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Athanasios Chatzidimitriou | 1 | 59 | 6.83 |
| George Papadimitriou | 2 | 36 | 4.38 |
| Gizopoulos, D. | 3 | 105 | 9.80 |
| Shrikanth Ganapathy | 4 | 14 | 2.22 |
| J. Kalamatianos | 5 | 32 | 4.19 |