| Assessing the Effects of Low Voltage in Branch Prediction Units | 4 | 0.39 | 2019 |
| Demystifying Soft Error Assessment Strategies on ARM CPUs: Microarchitectural Fault Injection vs. Neutron Beam Experiments | 0 | 0.34 | 2019 |
| Adaptive Voltage/Frequency Scaling and Core Allocation for Balanced Energy and Performance on Multicore CPUs | 7 | 0.41 | 2019 |
| Measuring and Exploiting Guardbands of Server-Grade ARMv8 CPU Cores and DRAMs | 1 | 0.34 | 2018 |
| Statistical Analysis of Multicore CPUs Operation in Scaled Voltage Conditions. | 4 | 0.38 | 2018 |
| Micro-Viruses for Fast System-Level Voltage Margins Characterization in Multicore CPUs | 4 | 0.42 | 2018 |
| Analysis and Characterization of Ultra Low Power Branch Predictors | 0 | 0.34 | 2018 |
| HealthLog Monitor: A Flexible System-Monitoring Linux Service | 0 | 0.34 | 2018 |
| An Energy-Efficient And Error-Resilient Server Ecosystem Exceeding Conservative Scaling Limits | 0 | 0.34 | 2018 |
| MeRLiN: Exploiting Dynamic Instruction Behavior for Fast and Accurate Microarchitecture Level Reliability Assessment. | 2 | 0.36 | 2017 |
| RT Level vs. Microarchitecture-Level Reliability Assessment: Case Study on ARM(R) Cortex(R)-A9 CPU | 1 | 0.36 | 2017 |
| Harnessing voltage margins for energy efficiency in multicore CPUs. | 17 | 0.70 | 2017 |
| Microprocessor reliability-performance tradeoffs assessment at the microarchitecture level | 1 | 0.37 | 2016 |
| Faults in data prefetchers: Performance degradation and variability | 1 | 0.35 | 2016 |
| Unveiling difficult bugs in address translation caching arrays for effective post-silicon validation | 1 | 0.35 | 2016 |
| Hierarchical synthesis of quantum and reversible architectures | 0 | 0.34 | 2015 |
| Online error detection in multiprocessor chips: A test scheduling study | 4 | 0.42 | 2013 |
| Systematic software-based self-test for pipelined processors | 31 | 1.53 | 2006 |
| Deterministic software-based self-testing of embedded processor cores | 27 | 1.72 | 2001 |
