Name
Title | ||
|---|---|---|
A <inline-formula> <tex-math notation="LaTeX">$\Delta\Sigma$ </tex-math></inline-formula> Modulator-Based Spread-Spectrum Clock Generator with Digital Compensation and Calibration for Phase-Locked Loop Bandwidth |
Abstract | ||
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A spread-spectrum clock generator (SSCG) is an essential building block for reducing electromagnetic interference (EMI) in a system-on-a-chip without shielding the device that increases the system cost and weight. In a
<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\Delta } {\Sigma }$ </tex-math></inline-formula>
modulator (DSM)-based SSCG, EMI reduction is degraded by attenuating the harmonic components of the generated profile owing to the phase-locked loop bandwidth (
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). This brief proposes a DSM-based SSCG with a digital compensator to maximize EMI reduction with a triangular profile. By adaptively reconfiguring the gains of the digital compensator, the proposed SSCG maintains the EMI reduction regardless of
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variations. The EMI reduction is improved by 2.17 dB at 1.35 GHz with the lowest
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. A prototype of the proposed SSCG is fabricated using 65-nm CMOS technology. The measured RMS jitter and power consumption are is 2.47 ps and 7 mW, respectively and the die occupies 0.292 mm
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. |
Year | DOI | Venue |
|---|---|---|
2019 | 10.1109/TCSII.2018.2846690 | IEEE Transactions on Circuits and Systems II: Express Briefs |
Keywords | DocType | Volume |
Phase locked loops,Electromagnetic interference,Calibration,Frequency modulation,Generators,Detectors | Journal | 66 |
Issue | ISSN | Citations |
2 | 1549-7747 | 1 |
PageRank | References | Authors |
0.48 | 0 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sang-Geun Bae | 1 | 7 | 3.29 |
| Sewook Hwang | 2 | 41 | 10.43 |
| Junyoung Song | 3 | 40 | 11.42 |
| Yeon-Ho Lee | 4 | 1 | 1.16 |
| Chulwoo Kim | 5 | 397 | 74.58 |