Abstract | ||
---|---|---|
Coarse-Grained Reconfigurable Arrays (CGRAs) are mostly hardware accelerators for multimedia applications which require only integer operations in most cases. We design a CGRA with multiple Floating Point Units suitable for High-Performance Computing (HPC). This PhD project is about halfway completed. |
Year | DOI | Venue |
---|---|---|
2018 | 10.1109/RECONFIG.2018.8641720 | 2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig) |
Keywords | Field | DocType |
Coarse-Grained Reconfigurable Array,High-Performance Computing,Hardware Accelerator | Integer,Reconfigurable array,Computer architecture,Supercomputer,Floating point,Computer science,Parallel computing,Hardware acceleration | Conference |
ISSN | ISBN | Citations |
2325-6532 | 978-1-7281-1968-7 | 1 |
PageRank | References | Authors |
0.36 | 0 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Philipp S. Käsgen | 1 | 1 | 0.36 |
Markus Weinhardt | 2 | 169 | 18.88 |
Christian Hochberger | 3 | 457 | 99.51 |