Title
Query Processing on OpenCL-Based FPGAs: Challenges and Opportunities
Abstract
Traditionally, FPGAs were programmed using low-level Hardware Description Languages (HDLs) like Verilog or VHDL, which made it extremely difficult to design, build and maintain systems for FPGAs. However, the recent release of OpenCL SDKs by FPGA vendors like Xilinx and Altera have significantly improved the programmability of FPGAs and have brought new research opportunities for query processing systems on FPGAs. It remains an open question whether and how we can optimize OpenCL based database engines for FPGAs. There is a gap on optimizations and tuning between OpenCL and FPGA, since OpenCL is mainly designed for parallel multi-/many-core architectures. In this paper, we attempt to answer this question under the context of pipelined query execution. For this, we first perform a detailed study of database engines on the latest generation of FPGAs. We then design an FPGA based shared pipeline query execution system (FADE) which exploits the hardware features of FPGAs and minimizes inefficiencies like the high communication reconfiguration overhead. Our experiments show that our design achieves significant performance speedup over existing approaches for pipelined query executions on FPGA. Finally, we also present the challenges and opportunities for query processing on the latest generation FPGAs.
Year
DOI
Venue
2018
10.1109/PADSW.2018.8644616
2018 IEEE 24th International Conference on Parallel and Distributed Systems (ICPADS)
Keywords
Field
DocType
Field programmable gate arrays,Pipelines,Random access memory,Hardware,Query processing,Engines
Pipeline transport,Computer science,Field-programmable gate array,Exploit,VHDL,Verilog,Control reconfiguration,Hardware description language,Speedup,Distributed computing,Embedded system
Conference
ISSN
ISBN
Citations 
1521-9097
978-1-5386-7308-9
0
PageRank 
References 
Authors
0.34
0
3
Name
Order
Citations
PageRank
Johns Paul1265.46
Bingsheng He22810179.09
Chiew Tong Lau340635.82