Title
Evaluating the Impact of Process Variability and Radiation Effects on Different Transistor Arrangements
Abstract
The high integration capacity of digital circuits, which occurs due to technological scaling, presents new challenges for nanotechnology designs. The evolution of integrated circuits has made them more susceptible to faults, besides increasing the process variability, which can lead to circuits operating outside their specification ranges. This work evaluates the effects of process variability and radiation faults on complex gates. These effects are compared to alternative circuits that implement the same functions but exploring a multi-level of basic cells as NAND2, NOR2 and Inverters. The technology adopted is 7nm FinFET ASAP. Results show that although complex cells present better timing and power results, multi-level circuits are up to 28% less sensible to radiation faults and about 40% more stable under process variability.
Year
DOI
Venue
2018
10.1109/VLSI-SoC.2018.8644828
2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
Keywords
Field
DocType
Logic gates,FinFETs,Circuit faults,Radiation effects,Metals,Transient analysis
Logic gate,Digital electronics,Computer science,Electronic engineering,Process variability,Electronic circuit,Transistor,Integrated circuit,Scaling,Radiation
Conference
ISSN
ISBN
Citations 
2324-8432
978-1-5386-4756-1
2
PageRank 
References 
Authors
0.40
0
4
Name
Order
Citations
PageRank
Leonardo H. Brendler142.52
Alexandra L. Zimpeck2175.95
Cristina Meinhardt32113.35
Ricardo A. L. Reis421748.75