Name
Title | ||
|---|---|---|
An ultra-high bandwidth sub-ranging ADC with programmable dynamic range in 32nm CMOS SOI |
Abstract | ||
|---|---|---|
A 7GS/s 6b sub-ranging ADC is implemented in 32nm CMOS SOI with reconfigurable comparators, and adjustable input differential pairs are exploited to change converter characteristics for hardware-based cybersecurity. To achieve low-power consumption at high-speed operation with small-size transistors, an on-chip calibration to reduce process mismatches is utilized in the design. The presented ADC achieves an SNDR of 33.06 dB at Nyquist frequency and consumes only 15mW with a figure-of-merit of 58.3 fJ/conv-step. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/MWSCAS.2017.8052956 | Midwest Symposium on Circuits and Systems Conference Proceedings |
Keywords | Field | DocType |
Analog-to-digital converter,low power,high-speed,sub-ranging,cybersecurity | Cmos soi,Comparator,Dynamic range,Computer science,Nyquist frequency,Electronic engineering,Ranging,Transistor,Calibration,High bandwidth | Conference |
ISSN | Citations | PageRank |
1548-3746 | 0 | 0.34 |
References | Authors | |
2 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jen-Chieh Hsueh | 1 | 0 | 0.34 |
| Chen, V.H.-C. | 2 | 5 | 2.66 |
| Plouchart, J.-O. | 3 | 31 | 5.54 |