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PLOUCHART, J.-O.
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Name
Affiliation
Papers
PLOUCHART, J.-O.
Dev. Center, IBM Semicond. Res., Hopewell Junction, NY, USA|c|
9
Collaborators
Citations
PageRank
31
31
5.54
Referers
Referees
References
111
231
61
Search Limit
100
231
Publications (9 rows)
Collaborators (31 rows)
Referers (100 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
An ultra-high bandwidth sub-ranging ADC with programmable dynamic range in 32nm CMOS SOI
0
0.34
2017
A 23.5 GHz PLL With an Adaptively Biased VCO in 32 nm SOI-CMOS
0
0.34
2013
An Integral Path Self-Calibration Scheme for a Dual-Loop PLL
12
1.29
2013
Exploiting Combinatorial Redundancy for Offset Calibration in Flash ADCs
10
0.79
2011
Wideband mmWave CML static divider in 65nm SOI CMOS technology
2
0.42
2008
Performance Variations of a 66GHz Static CML Divider in 90nm CMOS
6
1.31
2006
Design and manufacturability aspect of SOI CMOS RFICs
0
0.34
2004
A 4-91-GHz traveling-wave amplifier in a standard 0.12-μm SOI CMOS microprocessor technology
1
0.37
2004
A 4-91 GHz distributed amplifier in a standard 0.12 μm SOI CMOS microprocessor technology
0
0.34
2003
1