Name
Abstract | ||
|---|---|---|
In this paper, the minimum total required transconductance for the different architectures of the pipelined ADC are computed. This helps the pipelined ADC designers to find the most power-efficient architecture between different topologies based on the same input-referred thermal noise. It is shown that the Algorithmic-Pipelined ADC requires a simpler Sub-ADC and shows lower sensitivity to the Multiplying DAC (MDAC) errors and smaller area and power dissipation in comparison to the conventional multi-bit per stage pipelined ADC. Also, it is shown that the Algorithmic-Pipelined architecture is more-tolerant to capacitive mismatch for the same input-referred thermal noise than the conventional multi-bit per stage architecture. To take full advantage of these properties, a modified residue curve for the pipelined ADC is proposed. This concept introduces better linearity compared with the conventional residue curve of the pipelined ADC; this approach is particularly attractive for the digitization of signals with large peak to average ratio such as OFDM coded signals. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/MWSCAS.2017.8053205 | Midwest Symposium on Circuits and Systems Conference Proceedings |
Keywords | Field | DocType |
algorithmic pipelined ADC,residue curve,total required transconductance,MDAC errors | Algorithm design,Computer science,Dissipation,Linearity,Noise (electronics),Capacitive sensing,Electronic engineering,Transconductance,Residue curve,Orthogonal frequency-division multiplexing | Conference |
ISSN | Citations | PageRank |
1548-3746 | 0 | 0.34 |
References | Authors | |
5 | 2 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Mohammad H. Naderi | 1 | 0 | 1.35 |
| Jose Silva-Martinez | 2 | 630 | 86.56 |