Name
Title | ||
|---|---|---|
A Permanent Fault Tolerant Dynamic Task Allocation Approach for Network-on-Chip based Multicore Systems |
Abstract | ||
|---|---|---|
Rapid advancement in deep sub-micron regime has made the integration of multiple processing elements possible on a single chip. This has enabled parallel execution of applications on Network-on-Chip (NoC) based multiprocessor platforms. Task mapping and scheduling play crucial roles in timing response and energy consumption of such systems. Tasks present in these applications can be of mixed critical in nature with different importance. However, the on-chip processors executing these tasks of any given application might fail during runtime. Fault tolerance becomes challenging when real-time applications with mixed critical requirements are hosted on such fault prone environment. The complexity of the problem is further magnified in dynamic scenarios when such real-time applications can enter or leave the multicore platform at any time instant. Although several prior works have addressed fault tolerant resource allocation for mixed critical applications, few of these consider permanent processor faults. In this work, an improved fault tolerant resource allocation strategy is presented to mitigate the effect of permanent processor faults on mixed critical applications. The proposed algorithm offers a runtime solution to the unified problem of fault tolerant mapping and scheduling for real-time applications. Both the temporal property of the tasks and the timing information of the faults have been considered while implementing a suitable fault tolerance strategy that reduces the communication energy consumption and provides an improved level of quality of service for the executing applications. A detailed evaluation of the performance of the proposed algorithm has been conducted for different applications. On comparing with other state-of-the-art fault tolerant approaches, the proposed policy shows 28.5% average reduction in communication energy consumption while achieving 34.7% improved quality of service. Additionally, the proposed scheme shows better scalability in comparison to the recent techniques reported in literature. |
Year | DOI | Venue |
|---|---|---|
2019 | 10.1016/j.sysarc.2018.10.003 | Journal of Systems Architecture |
Keywords | Field | DocType |
Network-on-Chip,Multicore systems,Dynamic resource allocation,Energy,Deadline,Fault tolerance | Scheduling (computing),Computer science,Network on a chip,Real-time computing,Multiprocessing,Fault tolerance,Resource allocation,Multi-core processor,Energy consumption,Distributed computing,Scalability | Journal |
Volume | ISSN | Citations |
97 | 1383-7621 | 0 |
PageRank | References | Authors |
0.34 | 45 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Suraj Paul | 1 | 17 | 3.35 |
| Navonil Chatterjee | 2 | 26 | 6.21 |
| Prasun Ghosal | 3 | 51 | 22.38 |