Abstract | ||
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This paper covers the design of processor arrays for algorithmswith uniform dependencies. The design constraint is a limitedlatency of the resulting processor array. As objective of the design theminimization of the costs for an implementation of the processor arrayin silicon is considered.Our approach starts with the determination of a set of proper linear allocationfunctions with respect to the number of processors. It follows thecomputation of a uniform ane scheduling function. ... |
Year | DOI | Venue |
---|---|---|
1998 | 10.1007/BFb0057962 | Euro-Par |
Keywords | Field | DocType |
integer programming,real time system,linear programming,system architecture,computer network | Processor array,Computer science,Systolic array,Real-time operating system,Real-time computing,Integer programming,Minification,Linear programming,Systems architecture,Cycles per instruction | Conference |
Volume | ISSN | ISBN |
1470 | 0302-9743 | 3-540-64952-2 |
Citations | PageRank | References |
8 | 0.64 | 8 |
Authors | ||
2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Dirk Fimmel | 1 | 48 | 6.45 |
Renate Merker | 2 | 159 | 20.59 |