Abstract | ||
---|---|---|
Numerous application domains (e.g., signal and image processing, computer graphics, computer vision, and machine learning) are inherently error tolerant, which can be exploited to produce approximate ASIC implementations with low power consumption at the expense of negligible or small reductions in application quality. A major challenge is the need for approximate and high-level design generation ... |
Year | DOI | Venue |
---|---|---|
2019 | 10.1109/TETC.2016.2598283 | IEEE Transactions on Emerging Topics in Computing |
Keywords | Field | DocType |
Logic gates,Adders,Standards,Approximation algorithms,Signal processing algorithms,Algorithm design and analysis,Power demand | Algorithm design,Abacus (architecture),Computer science,Abstract syntax tree,Real-time computing,Theoretical computer science,Application-specific integrated circuit,Data type,Design space exploration,Computer engineering,Computer graphics,Scalability | Journal |
Volume | Issue | ISSN |
7 | 1 | 2168-6750 |
Citations | PageRank | References |
5 | 0.44 | 0 |
Authors | ||
5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Kumud Nepal | 1 | 53 | 2.76 |
Soheil Hashemi | 2 | 71 | 7.74 |
Hokchhay Tann | 3 | 25 | 3.66 |
R. Iris Bahar | 4 | 878 | 84.31 |
Sherief Reda | 5 | 1283 | 92.25 |