Paper Info
Title
Fast Hardware Implementations of Static P Systems.
Abstract
In this article we present a simulator of non-deterministic static P systems using Field Programmable Gate Array (FPGA) technology. Its major feature is a high performance, achieving a constant processing time for each transition. Our approach is based on representing all possible applications as words of some regular context-free language. Then, using formal power series it is possible to obtain the number of possibilities and select one of them following a uniform distribution, in a fair and non-deterministic way. According to these ideas, we yield an implementation whose results'show an important speed-up, with a strong independence from the size of the P system.
Year
Venue
Keywords
2016
COMPUTING AND INFORMATICS
Reconfigurable hardware,P systems,static P systems,FPGA,membrane computing,parallel implementations of membrane computing,simulator of membrane computing,hardware implementations of membrane computing,parallel implementations of static P systems,simulator of static P systems
Field
DocType
Volume
Christian ministry,Computer architecture,Hardware implementations,Computer science,Field-programmable gate array,Theoretical computer science,Membrane computing,Government,Reconfigurable computing
Journal
35
Issue
ISSN
Citations 
3
1335-9150
0
PageRank 
References 
Authors
0.34
0
5
Name
Order
Citations
PageRank
Juan Quiros120.71
Sergey Verlan241545.40
Julian Viejo300.34
Alejandro Millán4105.77
Manuel Jesús Bellido Díaz522.23