Name
Abstract | ||
|---|---|---|
In this work, we develop two methods to improve the accuracy of memory power estimation. Our enhanced memory power model can consider not only the operation mode of memory access, but also the address switching effect and the scaling factors that use the information of physical architecture. The proposed approach is very useful to be combined with memory compiler to generate accurate power model for any specified memory size without extra characterization costs. Then the proposed dummy modular approach can link our enhanced memory power model into commercial power estimation flow smoothly. The experimental results have shown that the average error of our memory power model is only less than 5%. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1007/11847083_53 | PATMOS |
Keywords | Field | DocType |
accurate power model,embedded memory,memory power model,specified memory size,lib format,memory access,scalable power modeling approach,enhanced memory power model,commercial power estimation flow,memory compiler,proposed dummy modular approach,memory power estimation | Registered memory,Interleaved memory,Uniform memory access,Extended memory,Physical address,Computer science,Electronic engineering,Real-time computing,Memory management,Flat memory model,Memory refresh | Conference |
Volume | ISSN | ISBN |
4148 | 0302-9743 | 3-540-39094-4 |
Citations | PageRank | References |
0 | 0.34 | 5 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Wen-Tsan Hsieh | 1 | 27 | 3.40 |
| Chi-Chia Yu | 2 | 0 | 0.68 |
| Chien-Nan Jimmy Liu | 3 | 97 | 27.07 |
| Yi-Fang Chiu | 4 | 0 | 0.68 |