Name
Title | ||
|---|---|---|
A Double Sensing Scheme With Selective Bitline Voltage Regulation for Ultralow-Voltage Timing Speculative SRAM. |
Abstract | ||
|---|---|---|
A double sensing with selective bitline voltage regulation (DS-SBVR) scheme is proposed to improve the throughput of ultralow-voltage static random access memory (SRAM). It senses the bitline voltage swing twice and compares two samples for confirmation. The bitline voltage is dynamically regulated by charge sharing between two sensing steps. Different from other timing speculative SRAMs, its erro... |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/JSSC.2018.2837862 | IEEE Journal of Solid-State Circuits |
Keywords | Field | DocType |
Sensors,Random access memory,Timing,Voltage control,Latches,Threshold voltage,Image edge detection | Computer science,Voltage,Chip,Electronic engineering,Charge sharing,Static random-access memory,Figure of merit,Voltage regulation,Throughput,Threshold voltage | Journal |
Volume | Issue | ISSN |
53 | 8 | 0018-9200 |
Citations | PageRank | References |
2 | 0.43 | 0 |
Authors | ||
8 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jun Yang | 1 | 147 | 36.54 |
| Hao Ji | 2 | 15 | 3.45 |
| Yichen Guo | 3 | 2 | 0.43 |
| Jizhe Zhu | 4 | 2 | 0.77 |
| Yuan Zhuang | 5 | 199 | 14.96 |
| Zhi Li | 6 | 478 | 93.46 |
| Xinning Liu | 7 | 8 | 4.02 |
| Longxing Shi | 8 | 116 | 39.08 |