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XINNING LIU
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Name
Affiliation
Papers
XINNING LIU
Harbin Institute of Technology(Harbin Institute of Technology,Harbin Inst. of Technol.),Harbin,China
11
Collaborators
Citations
PageRank
30
8
4.02
Referers
Referees
References
35
183
53
Search Limit
100
183
Publications (11 rows)
Collaborators (30 rows)
Referers (35 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
Addressing Failure and Aging Degradation in MRAM/MeRAM-on-FDSOI Integration.
0
0.34
2019
Reliability Emphasized MTJ/CMOS Hybrid Circuit Towards Ultra-Low Power.
0
0.34
2018
Design and Implementation of a Reconfigurable Cryptographic Coprocessor with Multiple Side-Channel Attacks Countermeasures.
0
0.34
2018
A Low-Overhead Timing Monitoring Technique for Variation-Tolerant Near-Threshold Digital Integrated Circuits.
0
0.34
2018
MRAM-on-FDSOI Integration: A Bit-Cell Perspective
0
0.34
2018
A Double Sensing Scheme With Selective Bitline Voltage Regulation for Ultralow-Voltage Timing Speculative SRAM.
2
0.43
2018
Analytical Inverter Chain'S Delay And Its Variation Model For Sub-Threshold Circuits
0
0.34
2017
An Improved Timing Error Prediction Monitor For Wide Adaptive Frequency Scaling
0
0.34
2017
Analytical hold timing fixing for sub-threshold circuit based on its lognormal distribution
0
0.34
2017
HTD: A light-weight holosymmetrical transition detector based in-situ timing monitoring technique for wide-voltage-range in 40nm CMOS
1
0.36
2017
An energy-efficiency Optimized LEACH-C for wireless sensor networks
5
0.53
2012
1