Title
Energy efficient and side-channel secure hardware architecture for lightweight cipher SIMON
Abstract
Design of ultra-lightweight but secure encryption engine is a key challenge for Internet-of-Things (IOT) edge devices. We explore the architectural design space for datapath of 128-bit SIMON, a lightweight block cipher, to simultaneously increase energy-efficiency and resistance to power based side-channel analysis (PSCA) attacks. Alternative datapath architectures are implemented on FPGA (Spartan-6, 45nm) to perform power, performance and area (PPA)) analysis. We show that, although a bit-serial datapath minimizes area and power, a round unrolled datapath provides 919× higher energy-efficiency and 210× higher performance, compared to the baseline bitserial design. Moreover, the PSCA measurements demonstrate that a 6-round unrolled datapath improves minimum-traces-to-disclosure (MTD) for correlation power analysis (CPA) by at least 384× over baseline bitserial design with no successful CPA even with 500,000 measurements.
Year
DOI
Venue
2018
10.1109/HST.2018.8383906
2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
Keywords
Field
DocType
lightweight cryptography,energy efficiency,side channel analysis,round unrolling,SIMON
Datapath,Block cipher,Efficient energy use,Computer science,Field-programmable gate array,Encryption,Real-time computing,Edge device,Side channel attack,Embedded system,Hardware architecture
Conference
ISBN
Citations 
PageRank 
978-1-5386-4732-5
0
0.34
References 
Authors
10
4
Name
Order
Citations
PageRank
Arvind Singh161652.25
Nikhil Chawla233.41
Monodeep Kar35312.66
Saibal Mukhopadhyay4245.05