Name
Abstract | ||
|---|---|---|
As a necessary aid to system integration, we present a pattern-dependent-timing analysis tool, organized around an explicit formulation of elementary units and allowing accurate and fast evaluation of CMOS data paths.It can process large circuits accurately in reduced CPU time, thus allowing safe and fast temporal evaluation of CMOS VLSI circuits.
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Year | DOI | Venue |
|---|---|---|
1990 | 10.1109/EDAC.1990.136704 | EURO-DAC |
Keywords | Field | DocType |
fast evaluation,path runner,cmos integrated circuits,large circuit,necessary aid,circuit analysis computing,cmos vlsi circuit,system integration,elementary unit,cmos vlsi circuits,fast timing analyser,pattern-dependent timing analysis tool,vlsi,explicit formulation,pattern-dependent-timing analysis tool,reduced cpu time,temporal evaluation,cmos data path,algorithm design and analysis,circuits,very large scale integration,semiconductor device modeling,central processing unit,switches,timing analysis | Analyser,Central processing unit,CPU time,Computer science,Semiconductor device modeling,CMOS,Real-time computing,Static timing analysis,Computer hardware,Very-large-scale integration,System integration | Conference |
ISBN | Citations | PageRank |
978-0-8186-2024-9 | 2 | 0.69 |
References | Authors | |
3 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Denis Deschacht | 1 | 19 | 5.91 |
| P. Pinede | 2 | 2 | 0.69 |
| michel robert | 3 | 2 | 0.69 |
| Daniel Auvergne | 4 | 145 | 31.67 |