Paper Info
Title
Design-Based Fingerprinting Using Side-Channel Power Analysis for Protection Against IC Piracy.
Abstract
Intellectual property (IP) and integrated circuit (IC) piracy are of increasing concern to IP/IC providers because of the globalization of IC design flow and supply chains. Such globalization is driven by the cost associated with the design, fabrication, and testing of integrated circuits and allows avenues for piracy. To protect the designs against IC piracy, we propose a fingerprinting scheme based on side-channel power analysis and machine learning methods. The proposed method distinguishes the ICs which realize a modified netlist, yet same functionality. Our method doesn't imply any hardware overhead. We specifically focus on the ability to detect minimal design variations, as quantified by the number of logic gates changed. Accuracy of the proposed scheme is greater than 96 percent, and typically 99 percent in detecting one or more gate-level netlist changes. Additionally, the effect of temperature has been investigated as part of this work. Results depict 95.4 percent accuracy in detecting the exact number of gate changes when data and classifier use the same temperature, while training with different temperatures results in 33.6 percent accuracy. This shows the effectiveness of building temperature-dependent classifiers from simulations at known operating temperatures.
Year
DOI
Venue
2018
10.1109/ISVLSI.2018.00117
IEEE Computer Society Annual Symposium on VLSI
Keywords
Field
DocType
IP Piracy,Fingerprinting,Side-Channel Power Analysis,Machine Learning
Power analysis,Netlist,Logic gate,Computer science,Integrated circuit design,Supply chain,Side channel attack,Integrated circuit,Benchmark (computing),Embedded system
Conference
ISSN
Citations 
PageRank 
2159-3469
0
0.34
References 
Authors
0
4
Name
Order
Citations
PageRank
James Shey112.10
Naghmeh Karimi216821.98
Ryan Robucci37012.38
Chintan Patel438537.44