Title | ||
---|---|---|
A 12.8-Gb/s Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth, Large-Capacity Storage Systems |
Abstract | ||
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Toward the aim of realizing high-bandwidth, large-capacity nand flash memory-based storage systems, this paper presents a novel daisy-chain downlink interface (I/F) between a controller and a large number of nand packages. The daisy-chain I/F employs a tapered-bandwidth architecture with bridge-by-bridge data extraction based on a proposed spectrally compressed multi-band multiplexing (SCM2) technique to achieve low power consumption. By using the proposed downlink I/F, a nand controller can handle 32 low-cost nand packages while achieving 12.8-Gb/s throughput using two data wires. The fabricated prototype downlink I/F achieved a bit error rate (BER) of 10
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−12</sup>
with power consumption of 252.1 mW for the transmitter and 375.7 mW for all four receivers together. |
Year | DOI | Venue |
---|---|---|
2019 | 10.1109/JSSC.2018.2889704 | IEEE Journal of Solid-State Circuits |
Keywords | Field | DocType |
OFDM,Bridge circuits,Bandwidth,Downlink,Throughput,Frequency division multiplexing | Computer science,Frequency-division multiplexing,Daisy chain,NAND gate,Electronic engineering,Bandwidth (signal processing),Multiplexing,Orthogonal frequency-division multiplexing,Bit error rate,Telecommunications link | Journal |
Volume | Issue | ISSN |
54 | 4 | 0018-9200 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
9 |
Name | Order | Citations | PageRank |
---|---|---|---|
Yuta Tsubouchi | 1 | 0 | 1.01 |
Daisuke Miyashita | 2 | 72 | 9.99 |
Takashi Toi | 3 | 0 | 1.01 |
Yuji Satoh | 4 | 0 | 0.68 |
Fumihiko Tachibana | 5 | 37 | 5.98 |
Junji Wadatsumi | 6 | 6 | 1.78 |
m morimoto | 7 | 1 | 1.06 |
Ryuichi Fujimoto | 8 | 5 | 0.96 |
Jun Deguchi | 9 | 15 | 4.34 |