Abstract | ||
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In modern processors, data-movement consumes two orders of magnitude higher energy than a floating-point operation and hence, data-movement is becoming the primary bottleneck in scaling the performance of modern processors within the fixed power budget. Intelligent data-encoding techniques hold the promise of reducing the data-movement energy. In this paper, we present a survey of encoding techniques for reducing data-movement energy. By classifying the works on key metrics, we bring out their similarities and differences. This paper is expected to be useful for computer architects, processor designers and researchers in the area of interconnect and memory system design. |
Year | DOI | Venue |
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2019 | 10.1016/j.sysarc.2018.11.001 | Journal of Systems Architecture |
Keywords | Field | DocType |
Data movement,Encoding technique,Energy saving,Sparse code,Limited weight coding,Value locality,Value prediction | Power budget,Bottleneck,Computer science,Parallel computing,Systems design,Interconnection,Scaling,Computer engineering,Order of magnitude,Encoding (memory) | Journal |
Volume | ISSN | Citations |
97 | 1383-7621 | 3 |
PageRank | References | Authors |
0.41 | 74 | 2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Sparsh Mittal | 1 | 817 | 50.36 |
Subhrajit Nag | 2 | 3 | 0.41 |