A Survey of Deep Learning on CPUs: Opportunities and Co-Optimizations | 2 | 0.39 | 2022 |
CORIDOR: Using COherence and TempoRal LocalIty to Mitigate Read Disurbance ErrOR in STT-RAM Caches | 0 | 0.34 | 2022 |
MEGA-MAC: A Merged Accumulation based Approximate MAC Unit for Error Resilient Applications | 0 | 0.34 | 2022 |
WaferSegClassNet - A light-weight network for classification and segmentation of semiconductor wafer defects | 0 | 0.34 | 2022 |
NASCENT: A Non-Invasive Solution for Detecting Utilization of Servers in Bare-Metal Cloud | 0 | 0.34 | 2022 |
A Node-Embedding Features Based Machine Learning Technique for Dynamic Malware Detection | 0 | 0.34 | 2022 |
Design and Analysis of Novel Bit-flip Attacks and Defense Strategies for DNNs | 0 | 0.34 | 2022 |
A survey of hardware architectures for generative adversarial networks | 1 | 0.40 | 2021 |
A survey of deep learning techniques for vehicle detection from UAV images | 2 | 0.37 | 2021 |
A survey of SRAM-based in-memory computing techniques and applications | 2 | 0.39 | 2021 |
CURATING: A multi-objective based pruning technique for CNNs | 1 | 0.40 | 2021 |
Leveraging Prediction Confidence For Versatile Optimizations to CNNs. | 0 | 0.34 | 2021 |
A survey On hardware accelerators and optimization techniques for RNNs | 2 | 0.43 | 2021 |
Modeling Data Reuse in Deep Neural Networks by Taking Data-Types into Cognizance | 0 | 0.34 | 2021 |
A survey of accelerator architectures for 3D convolution neural networks | 2 | 0.43 | 2021 |
Inferring DNN layer-types through a Hardware Performance Counters based Side Channel Attack. | 0 | 0.34 | 2021 |
A survey on hardware security of DNN models and accelerators | 2 | 0.43 | 2021 |
A survey of techniques for intermittent computing | 0 | 0.34 | 2021 |
A Survey on Modeling and Improving Reliability of DNN Algorithms and Accelerators | 9 | 0.60 | 2020 |
A Survey of FPGA-based Accelerators for Convolutional Neural Networks | 18 | 0.80 | 2020 |
E2GC: Energy-efficient Group Convolution in Deep Neural Networks | 0 | 0.34 | 2020 |
Detecting Usage of Mobile Phones using Deep Learning Technique. | 0 | 0.34 | 2020 |
A survey on evaluating and optimizing performance of Intel Xeon Phi. | 0 | 0.34 | 2020 |
Improving Accuracy and Efficiency of Object Detection Algorithms Using Multiscale Feature Aggregation Plugins. | 0 | 0.34 | 2020 |
DeepPeep: Exploiting Design Ramifications to Decipher the Architecture of Compact DNNs | 0 | 0.34 | 2020 |
A survey of techniques for optimizing deep learning on GPUs. | 8 | 0.48 | 2019 |
A Survey of Techniques for Dynamic Branch Prediction. | 3 | 0.39 | 2019 |
A Survey of Encoding Techniques for Reducing Data-Movement Energy | 3 | 0.41 | 2019 |
A survey of spintronic architectures for processing-in-memory and neural networks | 3 | 0.43 | 2019 |
A survey of techniques for improving efficiency of mobile web browsing. | 0 | 0.34 | 2019 |
A survey on applications and architectural-optimizations of Micron's Automata Processor. | 3 | 0.40 | 2019 |
Address-stride assisted approximate load value prediction in GPUs | 0 | 0.34 | 2019 |
The Ramifications of Making Deep Neural Networks Compact | 1 | 0.39 | 2019 |
A Survey on Optimized Implementation of Deep Learning Models on the NVIDIA Jetson Platform | 11 | 0.79 | 2019 |
A survey of techniques for improving error-resilience of DRAM. | 2 | 0.35 | 2018 |
A survey of techniques for architecting SLC/MLC/TLC hybrid Flash memory-based SSDs. | 0 | 0.34 | 2018 |
A Survey of Techniques for Improving Security of Non-volatile Memories. | 2 | 0.37 | 2018 |
A Survey of Techniques for Cache Partitioning in Multicore Processors. | 3 | 0.38 | 2017 |
Building a Fast and Power Efficient Inductive Charge Pump System for 3D Stacked Phase Change Memories. | 0 | 0.34 | 2017 |
A survey of techniques for designing and managing CPU register file. | 5 | 0.39 | 2017 |
A survey of techniques for architecting TLBs. | 3 | 0.41 | 2017 |
Mitigating Read-disturbance Errors in STT-RAM Caches by Using Data Compression. | 0 | 0.34 | 2017 |
A survey of value prediction techniques for leveraging value locality. | 2 | 0.35 | 2017 |
A Survey of Techniques for Architecting and Managing GPU Register File | 2 | 0.42 | 2017 |
A Survey of Techniques for Architecting and Managing Asymmetric Multicore Processors. | 19 | 0.76 | 2016 |
A Survey of Techniques for Architecting Processor Components Using Domain-Wall Memory. | 6 | 0.62 | 2016 |
A Survey of Recent Prefetching Techniques for Processor Caches. | 4 | 0.46 | 2016 |
A Survey of Architectural Techniques for Near-Threshold Computing | 3 | 0.39 | 2016 |
A survey of power management techniques for phase change memory. | 6 | 0.40 | 2016 |
A Survey Of Techniques for Architecting DRAM Caches. | 10 | 0.45 | 2016 |