Paper Info
Title
Design and automation of VLSI architectures for bidirectional scan based fault localization approach in FPGA fabric aware cellular automata topologies
Abstract
Cellular automata (CA) have received significant attention in VLSI design for the inherent architectural advantages of modularity, cascadability, simplicity and localized interconnections. In this paper, we have designed FPGA fabric aware CA circuit topologies with a built-in bidirectional scan chain to facilitate fine-grained fault localization of any faulty logic element configured for circuit realization, without increase in logic resources or critical path delay. The scan path arrangement may also be used for seeding the CA with the desired initial state. The generation of circuit description files has been completely automated which further facilitates to single out the exact faulty logic element (if any) on which the circuit has been configured. The proposed architectures outperform the state-of-the-art error detection and fault localization techniques tailored for FPGA implementations both in terms of area and speed.
Year
DOI
Venue
2019
10.1016/j.jpdc.2019.03.021
Journal of Parallel and Distributed Computing
Keywords
Field
DocType
Cellular automata,FPGA,Fault localization,Bidirectional scan,Primitive instantiation,Placement,Design automation
Cellular automaton,Computer science,Parallel computing,Field-programmable gate array,Scan chain,Network topology,Error detection and correction,Automation,Computer hardware,Very-large-scale integration,Modularity
Journal
Volume
ISSN
Citations 
130
0743-7315
2
PageRank 
References 
Authors
0.45
0
2
Name
Order
Citations
PageRank
Ayan Palchaudhuri1117.67
Anindya Sundar Dhar29726.09