Title
Efficient Checkpointing with Recompute Scheme for Non-volatile Main Memory
Abstract
Future main memory will likely include Non-Volatile Memory. Non-Volatile Main Memory (NVMM) provides an opportunity to rethink checkpointing strategies for providing failure safety to applications. While there are many checkpointing and logging schemes in the literature, their use must be revisited as they incur high execution time overheads as well as a large number of additional writes to NVMM, which may significantly impact write endurance. In this article, we propose a novel recompute-based failure safety approach and demonstrate its applicability to loop-based code. Rather than keeping a fully consistent logging state, we only log enough state to enable recomputation. Upon a failure, our approach recovers to a consistent state by determining which parts of the computation were not completed and recomputing them. Effectively, our approach removes the need to keep checkpoints or logs, thus reducing execution time overheads and improving NVMM write endurance at the expense of more complex recovery. We compare our new approach against logging and checkpointing on five scientific workloads, including tiled matrix multiplication, on a computer system model that was built on gem5 and supports Intel PMEM instruction extensions. For tiled matrix multiplication, our recompute approach incurs an execution time overhead of only 5%, in contrast to 8% overhead with logging and 207% overhead with checkpointing. Furthermore, recompute only adds 7% additional NVMM writes, compared to 111% with logging and 330% with checkpointing. We also conduct experiments on real hardware, allowing us to run our workloads to completion while varying the number of threads used for computation. These experiments substantiate our simulation-based observations and provide a sensitivity study and performance comparison between the Recompute Scheme and Naive Checkpointing.
Year
DOI
Venue
2019
10.1145/3323091
ACM Transactions on Architecture and Code Optimization (TACO)
Keywords
Field
DocType
Memory systems, computer architecture, emerging memory technologies
Computer science,Parallel computing,Thread (computing),Execution time,Memory systems,Matrix multiplication,System model,Computation,Overhead (business)
Journal
Volume
Issue
ISSN
16
2
1544-3566
Citations 
PageRank 
References 
1
0.35
0
Authors
6
Name
Order
Citations
PageRank
Mohammad A. Alshboul1143.26
Hussein Elnawawy280.81
Reem Elkhouly342.89
Keiji Kimura412023.20
James Tuck556433.06
Yan Solihin62057111.56